1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device suitable for a ferroelectric memory.
2. Description of the Related Art
In recent years, there are increasing tendencies to process or save a large capacity of data at a high speed with progression of the digital technique. Therefore, there is a demand for high integration and high performance of semiconductor devices for use in electronic equipment.
Hence, on a semiconductor memory, a technique has begun to be extensively researched and developed that uses a ferroelectric material or high dielectric constant material in place of silicon oxide or silicon nitride in the prior art as a capacity insulation film of capacitor elements constituting a DRAM to realize, for example, high integration of the DRAM.
Further, a technique using a ferroelectric film having spontaneous polarization characteristics as the capacity insulation film has also begun to be researched and developed to realize a non-volatile RAM capable of write operation and read operation at a lower voltage and a higher speed. Such a semiconductor memory is called a ferroelectric memory (FeRAM).
The FeRAM stores information through use of hysteresis characteristics of a ferroelectric. The ferroelectric memory includes ferroelectric capacitors, the ferroelectric capacitor having a ferroelectric film, as a capacitor dielectric film, sandwiched between a pair of electrodes. The ferroelectric film generates polarization in accordance with the voltage applied between the electrodes and has spontaneous polarization even after the applied voltage is removed. Further, when the polarity of the applied voltage is reversed, the polarity of the spontaneous polarization is also reversed. Accordingly, by detecting the spontaneous polarization, the information can be read. The FeRAM can operate at a low voltage and be written to with reduced power and at a high speed, as compared to a flash memory.
Used as the ferroelectric film of the FeRAM are PZT based materials such as lead zirconate titanate (PZT), La doped PZT (PLZT) and so on, and Bi layer structure compounds such as SrBi2Ta2O9 (SBT, Y1), SrBi2(Ta, Nb)2O9 (SBTN, YZ) and so on. These films are formed on a lower electrode film by a sol-gel method, a sputtering method, an MOCVD method, or the like. However, the films right after the formation are in an amorphous phase. Therefore, the films are transformed in phase into crystals of the perovskite structure by heat treatment thereafter. After the formation of the ferroelectric film, an upper electrode film is formed thereon. In this event, the ferroelectric film receives physical damage mainly by sputtering particles with high energy. As a result of this, part of the crystal structure of the ferroelectric film is broken to cause characteristic degradation of the capacitor element.
Hence, conventionally, the capacitor element is recovered from the characteristic degradation by the following processing. First, after patterning of the upper electrode film, heat treatment is performed in an oxygen atmosphere to thereby recover the crystallinity of the ferroelectric film. Then, after patterning of the ferroelectric film, an aluminum oxide film is formed as a protective film to cover the ferroelectric film in order to prevent hydrogen-induced degradation. Also during the patterning of the ferroelectric film and the formation of the protective film, damage occurs in the ferroelectric film. Therefore, after the formation of the protective film, heat treatment in the oxygen atmosphere is performed again to thereby recover the characteristics. Further, after patterning of the lower electrode film, an aluminum oxide film is formed again as a protective film. Then, heat treatment is performed and an interlayer insulation film is formed.
In the method, however, since a plurality of times of heat treatments are performed, mutual diffusion is apt to occur between the upper electrode (film) and the lower electrode (film) and the ferroelectric film, and thus the ferroelectric film included in the ferroelectric capacitor constituting a cell array is susceptible to defects. When the ferroelectric film is composed of a PLZT film and the upper electrode film is composed of an Ir film or IrOx film, Pb in the PLZT film is apt to remove. In particular, Pb loss is apt to occur after the patterning of the upper electrode, and Ir excessively diffuses from the upper electrode to the PLZT film. As a result of these, the composition in the films of the cell array becomes nonuniform, leading to a reduction in the switching charge amount or a tendency of degradation in process. Further, imprint is more apt to occur.
In addition to the above-described manufacturing method, various kinds of methods to improve the characteristics of the ferroelectric capacitor have been proposed.
In a method described in Patent Document 1 (Japanese Patent Application Laid-Open No. 2003-17664), an upper electrode film, a ferroelectric film, and a lower electrode film are patterned to form a capacitor element, and then an aluminum oxide film containing impurities removable by heat treatment is deposited to cover at least the capacitor element. Then, heat treatment at 800° C. for one minute is performed in an oxidizing gas atmosphere by an RTA (Rapid Thermal Annealing) method to thereby recover a capacity insulation film from damage and remove the impurities contained in the aluminum oxide layer. Thereafter, heat treatment is performed in a hydrogen atmosphere.
In a method described in Patent Document 2 (Japanese Patent Application Laid-Open No. Hei 11-54718), a capacitor element is formed and then a buffer film composed of a metal oxide film for preventing interaction between a ferroelectric film and an interlayer insulation film is formed. Thereafter, an interlayer insulation film is formed. As the buffer film, a film is used that is stabilized by a low-temperature treatment at 600° C. or lower.
However, in the method described in Patent Document 1, it is impossible to completely recover from the damage caused during the formation of the upper electrode film even by the heat treatment by the RTA method. In addition, it is conceivable that since the annealing is performed at 800° C., Ir excessively diffuses to PLZT to reduce the switching charge amount and increase the leak current.
Besides, in the method described in Patent Document 2, the metal oxide film stabilized by the low-temperature treatment at 600° C. or lower becomes the buffer film, but it is impossible to completely recover the capacitor from the damage.